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DS33Z41DK
TABLE OF CONTENTS
GENERAL DESCRIPTION ..........................................................................................................1
ORDERING INFORMATION .......................................................................................................1
DESIGN KIT CONTENTS............................................................................................................1
COMPONENT LIST .....................................................................................................................3
PC BOARD ERRATA ..................................................................................................................9
FILE LOCATIONS .......................................................................................................................9
BASIC OPERATION..................................................................................................................10
P OWERING U P THE D ESIGN K IT ...............................................................................................................10
General ............................................................................................................................................................... 10
B ASIC DS33Z41 I NITIALIZATION (U SED FOR A LL Q UICK S ETUPS ) .............................................................10
Quick Setup #1 (Device Driver + DS21458 T1/E1) ............................................................................................ 11
Quick Setup #2 (DS21458 T1/E1, Register Based) ........................................................................................... 11
Configuration Note: Using a Single System ....................................................................................................... 11
Configuration Note: A Mixing Device Driver and Register-Based Modes .......................................................... 11
CONFIGURATION SWITCHES AND JUMPERS......................................................................12
ADDRESS MAP (ALL CARDS) ................................................................................................14
Q UAD T1/E1 R ESOURCE C ARD FPGA R EGISTER M AP ............................................................................14
ID REGISTERS..........................................................................................................................14
CONTROL REGISTERS ....................................................................................................................... 15
DS33Z41 INFORMATION..........................................................................................................16
DS33Z41DK INFORMATION ....................................................................................................16
TECHNICAL SUPPORT ............................................................................................................16
DOCUMENT REVISION HISTORY ...........................................................................................16
SCHEMATICS ...........................................................................................................................17
LIST OF FIGURES
Figure 1. System Floorplan.......................................................................................................................................... 8
Figure 2. DS21458 Resource Card Floorplan ............................................................................................................. 8
Figure 3. Schematic Hierarchy and Floorplan ........................................................................................................... 17
LIST OF TABLES
Table 1. Component List (Decoupling Caps Not Shown)............................................................................................ 3
Table 2. Main Board PC Board Configuration ........................................................................................................... 12
Table 3. Overview of Daughter Card Address Map................................................................................................... 14
Table 4. Quad T1/E1 Processor Card FPGA Register Map...................................................................................... 14
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